--------------------------------------------------------------------------
--------------------------------------------------------------------------
--	File Name 	: decoder.v (see also encoder.v, noise.v)
--	Author(s)	: Paul R. Joslin
--	Affiliation	: Laboratory for Digital Design Environments
--			  Department of Electrical & Computer Engineering
--			  University of Cincinnati
--	Date Created	: June 1991
--	Introduction	: Behavioral description of decoder written in
--			  a synthesiszable subset of VHDL. It is part
--			  of the `Error Correction System'.
--
--      Source          : Original HardwareC version obained from
--                        the HLSW repository.
--
--	Modified For Synthesis by Jay(anta) Roy, University of Cincinnati.
--	Date Modified	: Sept, 91.
--
--	Disclaimer	: This comes with absolutely no guarantees of any
--			  kind (just stating the obvious ...)
--
--      Acknowledgement : The Distributed Synthesis Systems research at 
--                        the Laboratory for Digital Design Environments,
--                        University of Cincinnati, is sponsored in part 
--                        by the Defense Advanced Research Projects Agency 
--                        under order number 7056 monitored by the Federal 
--                        Bureau of Investigation under contract number 
--                        J-FBI-89-094.
--
--------------------------------------------------------------------------
--------------------------------------------------------------------------

-- necessary types in one package
package types is
    type Byte is array (0 to 7) of BIT;
    type Word is array (0 to 15) of BIT;
    type Three_bit is array (0 to 2) of BIT;
    type Two_bit is array (0 to 1) of BIT;
end types;

--  decoder
--  Transforms serial stream of data bits, and performs error
--  correction to retrieve original 8 bit data.
use Work.types.all;
entity decoder is
    port(decoder_in : in BIT;    -- serial data in
         data_ready : in BIT;    -- start conversion
         strobe     : in BIT;    -- read next serial bit
         data_out   : out Byte;  -- parallel data out
         err        : out Two_bit;  -- error code out
         out_ready  : out BIT);                  -- conversion complete
end decoder;

architecture decoder_behavior of decoder is
begin 
procd:	process
    variable i             : INTEGER;
    variable input_data    : Word;
    variable row_parity    : Three_bit;
    variable column_parity : Three_bit;
    variable global_parity : BIT;
    variable error         : Two_bit;
    alias top_bit : BIT is input_data(15);
 
    procedure xor4(a, b, c, d :  in BIT; result : out Bit) is
        variable xor4_i : Bit := '0';
    begin
	xor4_i := xor4_i xor a;
	xor4_i := xor4_i xor b;
	xor4_i := xor4_i xor c;
	xor4_i := xor4_i xor d;
        result := xor4_i;
    end xor4;

    begin
    wait on data_ready until data_ready  = '1';  -- wait for incoming data
    out_ready <= '0';  -- signal start of process
    --
    -- sample input stream
    --
    i := 0;
    while i < 16 loop
        wait on strobe until strobe = '1';
        input_data(i) := decoder_in;
        i := i + 1;
    end loop;
    -- compute parity check on input data    
    global_parity := top_bit;  -- had to use alias
    -- the decoder function used in the HardwareC description has
    -- been unrolled here.  
-- i = 0;
   xor4(input_data(0),
        input_data(1),
        input_data(2),
        input_data(9),
        row_parity(0));
   xor4(input_data(0),
    	input_data(3),
    	input_data(6),
    	input_data(12),
	column_parity(0));
   xor4(global_parity,
    	input_data(0),
    	input_data(1),
    	input_data(2),
	global_parity);
-- i = 1
   xor4(input_data(3),
        input_data(4),
        input_data(5),
        input_data(10),
        row_parity(1));
   xor4(input_data(1),
        input_data(4),
        input_data(7),
        input_data(13),
        column_parity(1));
   xor4(global_parity,
        input_data(3),
        input_data(4),
        input_data(5),
        global_parity);
-- i = 2
   xor4(input_data(6),
        input_data(7),
        input_data(8),
        input_data(11),
        row_parity(2));
   xor4(input_data(2),
        input_data(5),
        input_data(8),
        input_data(14),
        column_parity(2));
   xor4(global_parity,
        input_data(6),
        input_data(7),
        input_data(8),
        global_parity);

    -- i := i + 1;
    -- end loop;
    -- 
    -- Error Correction
    --
    if (global_parity = '0') then
        if (row_parity(0) = '0') and (row_parity(1) = '0') and 
           (column_parity(0) = '0') and (column_parity(1) = '0') then
            error(0) := '0';
            error(1) := '0';   -- no error
        else
            error(0) := '1';
            error(1) := '1';   -- multiple errors, no correction possible
        end if;
    else
        -- single error
        error(0) := '0';
        error(1) := '1';
        if (row_parity(0) = '1') then
            if (column_parity(0) = '1') then
                input_data(0) := not input_data(0);
            elsif (column_parity(1) = '1') then
                input_data(1) := not input_data(1);
            elsif (column_parity(2) = '1') then
                input_data(2) := not input_data(2);
            end if;
        elsif (row_parity(1) = '1') then
            if (column_parity(0) = '1') then
                input_data(3) := not input_data(3);
            elsif (column_parity(1) = '1') then
                input_data(4) := not input_data(4);
            elsif (column_parity(2) = '1') then
                input_data(5) := not input_data(5);
            end if;
        elsif (row_parity(2) = '1') then
            if (column_parity(0) = '1') then
                input_data(6) := not input_data(6);
            elsif (column_parity(1) = '1') then
                input_data(7) := not input_data(7);
            end if;
        end if;
    end if;    
   
  
    -- write outputs in parallel, 
    -- then pulse out_ready
    err(0) <= error(0);
    err(1) <= error(1);
    data_out(0) <= input_data(0);
    data_out(1) <= input_data(1);
    data_out(2) <= input_data(2);
    data_out(3) <= input_data(3);
    data_out(4) <= input_data(4);
    data_out(5) <= input_data(5);
    data_out(6) <= input_data(6);
    data_out(7) <= input_data(7);
    out_ready <= '1';
    wait for 1 ns;
    out_ready <= '0';
    end process;
end decoder_behavior;