library ieee; use ieee.std_logic_1164.all; -- 3 input Majority function using concurrent statement -- entity majconc is port ( A, B, C : in std_logic; Y: out std_logic ); end majconc; ARCHITECTURE a of majconc is begin Y <= (A and B) or (A and C) or (B and C); end a; <div align="center"><br /><script type="text/javascript"><!-- google_ad_client = "pub-7293844627074885"; //468x60, Created at 07. 11. 25 google_ad_slot = "8619794253"; google_ad_width = 468; google_ad_height = 60; //--></script> <script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js"> </script><br /> </div>