library dp_32;
use DP_32.DP32_TYPES.all ;

entity MEMORY is
   generic(Tpd : TIME := 1 ns ) ;
      port(D_BUS  : inout BUS_BIT_32  bus;
           A_BUS  : in    BIT_32         ;
           READ   : in    BIT            ;
           WRITE  : in    BIT            ;
           READY  : out   BIT            ) ;
end MEMORY ;           
           
architecture BEHAVIOUR of MEMORY is
   begin
   RAM_DEVICE:
      process

      constant LOW_ADDRESS  : INTEGER := 0    ;
      constant HIGH_ADDRESS : INTEGER := 1023 ;  
      type MEMORY_ARRAY is array(INTEGER range LOW_ADDRESS to HIGH_ADDRESS)
                                                                   of BIT_32 ;
      variable MEM : MEMORY_ARRAY;   
      variable ADDRESS : INTEGER ;
      variable debut: integer :=0;
   
         begin

            if debut=0 then
               mem(0):=X"10010105"; -- ADDq R1+5->R1
               mem(1):=X"500000FE"; -- BRq  -2
               debut:=1;
            end if;
            --
            D_BUS <= null after Tpd ;
            READY <= '0' after Tpd ;
            --
            wait until (READ = '1') or (WRITE = '1') ;
            --
            ADDRESS := BITS_TO_INT(A_BUS) ;
            if ADDRESS >= LOW_ADDRESS and ADDRESS <= HIGH_ADDRESS then
               if WRITE = '1' then
                  READY <= '1' after Tpd ;
                  wait until WRITE = '0' ;
                  MEM(ADDRESS) := D_BUS ;
               else 
                  D_BUS <= MEM(ADDRESS) after Tpd ;
                  READY <= '1' after Tpd ;
                  wait until READ = '0' ;
               end if ;
            end if ;
      end process ;               
         
end BEHAVIOUR ;