library IEEE; use IEEE.std_logic_1164.all; package hardware_specifications is type edge is (positive, negative); type edge_array is array (integer range <>) of edge; type std_logic_2D_array is array (integer range <>, integer range <>) of std_logic; type std_ulogic_2D_array is array (integer range <>, integer range <>) of std_ulogic; -- type logic_5_vector is array (integer range <>) of std_logic_vector(4 downto 0); end hardware_specifications;