The std_ulogic_vector type

The std_ulogic_vector type is used for arrays of std_ulogic variables and signals; it's an unresolved version of std_logic_vector.

The basic VHDL logic operations are defined on this type: and, nand, or, nor, xor, xnor. These must be given two arrays of the same size; they do the operation on ecah position and return another array. The not operation negates each position in the array.