Combinational Logic and The Wonders of 581AH
EE481 Logic Design Lab
Fall 2003, Lab #1
- Show a design for a circuit
implemented with AND gates and inverters.
- What is the minimal Sum of Products (SOP) form? How does it
differ from the Canonical Sum of Products form?
- Show the minimal SOP, minimal POS, Canonical POS, and Canonical
SOP for:
- Answer the following questions using your TTL book:
- What range of voltage is acceptable for
for standard TTL?
- What is
? (Define and give a
typical or max value for std. TTL)
- What is
? (Define and give a
typical or max value for std. TTL)
- What is
? (Define and give a
typical or max value for std. TTL)
- What is
? (Define and give a
typical or max value for std. TTL)
- What fanout would you expect for the LS TTL logic we use in
lab?
What would the drop resistor for an LED need to be if:
We wanted to connect the LED to of +5v;
The forward biased LED junction drops .9v;
Max current through the LED is 20mA.
Design a circuit with 8 bits as input that will display on a
7-segment display:
- ``O''
if the unsigned number represented by the 8 bits is odd.
- ``E''
if the unsigned number represented by the 8 bits is even.
Design a combinational circuit that uses only NAND gates to
implement
a security system for a vault. The circuit has two inputs ``A'' (that
is
high when the system is armed, low else) and ``D'' (that is high when
the door i
s
open, low else) and two outputs ``G'' (green LED) and ``R'' (red LED).
The
circuit will operate as follows:
