Assignments:

       Assignment 1)  --- Network on chip summary  (due :23/2/2010)     Tutorial paper

       Assignment 2)  --  Simulation / Synthesis / Place and Route (due 15/3/2010)

       Assignment 3)  -- Adder Structures Implementation & Filter Design

       Assignment 4)  -- (due 16 May 2010)     (New !!!  Reference solution of HW4)

Tutorials:

       Tutorial 1)  -- Tutorial on VHDL & Verilog

       Tutorial 2)  -- Design Automation Tools (Design Vision & SoC Encounter)